Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
| Reel/Frame: | 037723/0880 | |
| Pages: | 5 |
| | Recorded: | 02/12/2016 | | |
| Attorney Dkt #: | 81738-000308 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
|
|
Total properties:
11
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/1999
|
Application #:
|
07865646
|
Filing Dt:
|
04/10/1992
|
|
Title:
|
METHOD OF PRODUCING A BIPOLAR TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08054074
|
Filing Dt:
|
04/27/1993
|
|
Title:
|
SEMICONDUCTOR SENSOR DEVICE COMPRISED OF PLURAL SENSOR CHIPS CONNECTED TO FUNCTION AS A UNIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/1999
|
Application #:
|
08544454
|
Filing Dt:
|
10/18/1995
|
|
Title:
|
METHOD OF PRODUCING MIS TRANSISTOR HAVING GATE ELECTRODE OF MATCHED CONDUCTIVITY TYPE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08611662
|
Filing Dt:
|
03/06/1996
|
|
Title:
|
METHOD AND APPARATUS FOR RECEIVING SELECTED PAGING SIGNAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2001
|
Application #:
|
08618919
|
Filing Dt:
|
03/20/1996
|
|
Title:
|
LINEAR IMAGE SENSOR DEVICE, IC ASSEMBLING SUBSTRATE AND METHOD FOR ASSEMBLING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/1998
|
Application #:
|
08629059
|
Filing Dt:
|
04/08/1996
|
|
Title:
|
SEMICONDUCTOR RADIATION-DETECTING DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2001
|
Application #:
|
08677541
|
Filing Dt:
|
07/10/1996
|
|
Title:
|
SMALL GEOMETRY HIGH VOLTAGE SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/1999
|
Application #:
|
08680346
|
Filing Dt:
|
07/17/1996
|
|
Title:
|
HIGH VOLTAGE INVERTER CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2002
|
Application #:
|
08689867
|
Filing Dt:
|
08/15/1996
|
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
08815907
|
Filing Dt:
|
03/12/1997
|
|
Title:
|
SEMICONDUCTOR DICING AND ASSEMBLING METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09407382
|
Filing Dt:
|
09/28/1999
|
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREFORE
|
|
|
Assignee
|
|
|
|
|
| 8, NAKASA 1-CHOME, |
| MIHAMA-KU, CHIBA-SHI |
| CHIBA, JAPAN 261-8507 |
|
|
Correspondence name and address
|
| |
TERESA LAVENUE
|
| |
555 THIRTEENTH STREET, N. W.
|
| |
WASHINGTON, DC 20004
|
Search Results as of:
05/15/2024 06:33 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
