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03/08/2005
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07/24/2001
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01/29/2002
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02/25/2000
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02/27/2001
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04/24/2000
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09/14/2004
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06/28/2000
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06/07/2005
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06/28/2000
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08/31/2004
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12/07/2000
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03/08/2005
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12/11/2000
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01/24/2002
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03/08/2005
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12/11/2000
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10/11/2001
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06/17/2003
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12/18/2000
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02/01/2005
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12/22/2000
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07/22/2003
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01/11/2001
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10/11/2001
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11/12/2002
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01/30/2001
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02/28/2001
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09/24/2002
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02/28/2001
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10/31/2002
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07/09/2002
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03/13/2001
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05/28/2002
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03/26/2001
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12/27/2001
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09/07/2004
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03/30/2001
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08/31/2004
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04/02/2001
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05/02/2002
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10/01/2002
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06/13/2001
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02/08/2005
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06/22/2001
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03/15/2005
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06/22/2001
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02/25/2003
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06/27/2001
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02/11/2003
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07/10/2001
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05/20/2003
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07/27/2001
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05/10/2005
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08/22/2001
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09/07/2004
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09/28/2001
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05/10/2005
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10/05/2001
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09/07/2004
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10/11/2001
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01/02/2003
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05/31/2005
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11/19/2001
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08/03/2004
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12/10/2001
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12/07/2004
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12/20/2001
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06/26/2003
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12/10/2002
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12/13/2001
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05/25/2004
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12/27/2001
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01/06/2004
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01/10/2002
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09/05/2002
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09/14/2004
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02/01/2002
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01/06/2004
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03/19/2002
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08/24/2004
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03/11/2002
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09/11/2003
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11/04/2003
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03/13/2002
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11/30/2004
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03/19/2002
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04/19/2005
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04/30/2002
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05/29/2003
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03/23/2004
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09/28/2004
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11/06/2003
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07/08/2003
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08/31/2004
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06/25/2002
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09/28/2004
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01/11/2005
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02/22/2005
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02/22/2005
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10/24/2002
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05/29/2003
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09/21/2004
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12/20/2002
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06/14/2005
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01/15/2004
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05/17/2005
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10636162
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Filing Dt:
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08/07/2003
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Title:
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TEST STRUCTURE FOR DETERMINING ELECTROMIGRATION AND INTERLAYER DIELECTRIC FAILURE
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Patent #:
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Issue Dt:
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07/12/2005
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Application #:
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10700454
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Filing Dt:
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11/05/2003
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Publication #:
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Pub Dt:
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05/27/2004
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Title:
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FREQUENCY MEASUREMENT CIRCUIT
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10716230
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Filing Dt:
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11/18/2003
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Title:
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DUAL CELL MEMORY DEVICE HAVING A TOP DIELECTRIC STACK
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Patent #:
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Issue Dt:
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03/29/2005
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Application #:
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10755430
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Filing Dt:
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01/12/2004
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Title:
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NARROW BITLINE USING SAFIER FOR MIRRORBIT
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Patent #:
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Issue Dt:
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11/09/2010
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Application #:
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10854781
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Filing Dt:
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05/27/2004
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Title:
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CHARGE/DISCHARGE CONTROL CIRCUIT AND SECONDARY BATTERY
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Patent #:
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Issue Dt:
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12/21/2004
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Application #:
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10863673
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Filing Dt:
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06/08/2004
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Title:
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MEMORY DEVICE AND METHODS OF USING NEGATIVE GATE STRESS TO CORRECT OVER-ERASED MEMORY CELLS
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10885944
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Filing Dt:
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07/07/2004
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Title:
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CUS FORMATION BY ANODIC SULFIDE PASSIVATION OF COPPER SURFACE
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Patent #:
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Issue Dt:
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04/26/2005
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Application #:
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10896967
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Filing Dt:
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07/23/2004
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Publication #:
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Pub Dt:
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12/23/2004
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Title:
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SIGNAL DETECTION APPARATUS, SIGNAL DETECTION METHOD, SIGNAL TRANSMISSION SYSTEM, AND COMPUTER READABLE PROGRAM TO EXECUTE SIGNAL TRANSMISSION
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Patent #:
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Issue Dt:
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12/02/2008
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Application #:
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10930856
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Filing Dt:
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09/01/2004
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Publication #:
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Pub Dt:
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02/03/2005
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT FOR DRIVING LIQUID CRYSTAL PANEL
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Patent #:
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Issue Dt:
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09/05/2006
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Application #:
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10933588
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Filing Dt:
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09/03/2004
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Title:
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SYSTEM AND METHOD FOR MULTI-BIT FLASH READS USING DUAL DYNAMIC REFERENCES
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Patent #:
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Issue Dt:
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04/20/2010
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Application #:
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10954754
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Filing Dt:
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10/01/2004
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Publication #:
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Pub Dt:
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12/15/2005
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Title:
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CHARGE CONTROL THAT KEEPS CONSTANT INPUT VOLTAGE SUPPLIED TO BATTERY PACK
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