|
|
Patent #:
|
|
Issue Dt:
|
12/19/2000
|
Application #:
|
09012398
|
Filing Dt:
|
01/23/1998
|
Title:
|
PULL-UP AND PULL DOWN CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/1999
|
Application #:
|
09012558
|
Filing Dt:
|
01/23/1998
|
Title:
|
INTERNAL CLOCK SIGNAL GENERATION CIRCUIT INCLUDING DELAY LINE, AND SYNCHRONOUS TYPE SEMICONDUCTOR MEMORY DEVICE INCLUDING INTERNAL CLOCK SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/1999
|
Application #:
|
09013669
|
Filing Dt:
|
01/26/1998
|
Title:
|
METHOD OF MANUFACTURING COMPLEMENTARY MOS SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1999
|
Application #:
|
09013911
|
Filing Dt:
|
01/27/1998
|
Title:
|
STATIC RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/1999
|
Application #:
|
09015490
|
Filing Dt:
|
01/28/1998
|
Title:
|
METHOD OF FABRICATING SEMICONDUCTOR DEVICE HAVING SOURCE/DRAIN LAYER RAISED FROM SUBSTRATE SURFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/1999
|
Application #:
|
09016274
|
Filing Dt:
|
01/30/1998
|
Title:
|
SEMICONDUCTOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/19/2000
|
Application #:
|
09016302
|
Filing Dt:
|
01/30/1998
|
Title:
|
PHASE-LOCKED LOOP CIRCUIT AND RADIO COMMUNICATION APPARATUS USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
09016636
|
Filing Dt:
|
01/30/1998
|
Title:
|
PROTECTION CIRCUIT AGAINST ELECTROSTATIC CHARGE APPLIED BETWEEN POWER SUPPLY TERMNALS FOR PREVENTING INTERNAL CIRCUIT THEREFROM REGARDLESS OF POLARITY THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
09016839
|
Filing Dt:
|
01/30/1998
|
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/1999
|
Application #:
|
09017167
|
Filing Dt:
|
02/02/1998
|
Title:
|
NONVOLATILE MEMORY CONTROL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
09017862
|
Filing Dt:
|
02/03/1998
|
Title:
|
INPUT/OUTPUT PROTECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2000
|
Application #:
|
09017878
|
Filing Dt:
|
02/03/1998
|
Title:
|
MICROCOMPUTER CONTAINING FLASH EEPROM THEREIN
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
09017960
|
Filing Dt:
|
02/03/1998
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2000
|
Application #:
|
09018055
|
Filing Dt:
|
02/03/1998
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2000
|
Application #:
|
09018441
|
Filing Dt:
|
02/04/1997
|
Title:
|
VERTICAL MOSFET AND METHOD OF MANUFACTURING THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2000
|
Application #:
|
09018934
|
Filing Dt:
|
02/05/1998
|
Title:
|
TEST CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/29/2000
|
Application #:
|
09019040
|
Filing Dt:
|
02/05/1998
|
Title:
|
FLASH MEMORY EMBEDDED MICROCOMPUTER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2000
|
Application #:
|
09019727
|
Filing Dt:
|
02/06/1998
|
Title:
|
A DELAY CIRCUIT HAVING A NOISE REDUCING FUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
09020571
|
Filing Dt:
|
01/27/1998
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND REDUNDANT ADDRESS SELECTION METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
09020596
|
Filing Dt:
|
02/04/1998
|
Title:
|
PULSE WIDTH MODULATION CONTROL WHICH DATA TRANSFER IS INHIBITED BY OVERFLOW SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2000
|
Application #:
|
09024874
|
Filing Dt:
|
02/17/1998
|
Title:
|
MEMORY ACCESS CONTROL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2001
|
Application #:
|
09025838
|
Filing Dt:
|
02/19/1998
|
Title:
|
SLAVE CIRCUIT SELECT DEVICE WHICH CAN INDIVIDUALLY SELECT A PLURALITY OF SLAVE CIRCUITS WITH ONE DATA BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
09025998
|
Filing Dt:
|
02/19/1998
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/1999
|
Application #:
|
09025999
|
Filing Dt:
|
02/19/1998
|
Title:
|
DATA LATCH CIRCUIT DEVICE WITH FLIP-FLOP OF SEMI-CONDUCTOR MEMORY OF SYNCHRONOUS DRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2000
|
Application #:
|
09026396
|
Filing Dt:
|
02/19/1998
|
Title:
|
OPERATION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1999
|
Application #:
|
09027194
|
Filing Dt:
|
02/20/1998
|
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2000
|
Application #:
|
09027224
|
Filing Dt:
|
02/20/1998
|
Title:
|
REFERENCE VOLTAGE GENERATING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/1999
|
Application #:
|
09028112
|
Filing Dt:
|
02/23/1998
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2000
|
Application #:
|
09030341
|
Filing Dt:
|
02/25/1998
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING INPUT PROTECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2000
|
Application #:
|
09030909
|
Filing Dt:
|
02/26/1998
|
Title:
|
TESTING MECHANISM IN A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE USING AN EXTERNAL CLOCK SIGNAL AND A NON-CONNECTION PININPUT SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/1999
|
Application #:
|
09030917
|
Filing Dt:
|
02/26/1998
|
Title:
|
FLIP FLOP CIRCUIT FOR SCAN TEST WITH TWO LATCH CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/1999
|
Application #:
|
09030956
|
Filing Dt:
|
02/26/1998
|
Title:
|
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
09031105
|
Filing Dt:
|
02/26/1998
|
Title:
|
HIGH READ SPEED MULTIVALUED READ ONLY MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
09033580
|
Filing Dt:
|
03/03/1998
|
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE OPERABLE AT HIGH SPEED WITH LOW POWER SUPPLY VOLTAGE WHILE SUPPRESSING INCREASE OF CHIP AREA
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2000
|
Application #:
|
09033675
|
Filing Dt:
|
03/03/1998
|
Title:
|
TRI-VOLTAGE BI-CMOS SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2000
|
Application #:
|
09033912
|
Filing Dt:
|
03/03/1998
|
Title:
|
METHOD OF FORMING A SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
09034996
|
Filing Dt:
|
03/05/1998
|
Title:
|
INTERNAL POTENTIAL GENERATION CIRCUIT THAT CAN OUTPUT A PLURALITY OF POTENTIALS, SUPPRESSING INCREASE IN CIRCUIT AREA
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
09035890
|
Filing Dt:
|
03/06/1998
|
Title:
|
TRACK JUMP CONTROLLING UNIT CAPABLE OF CORRECTLY JUMPING LIGHT BEAM SPOT OF PHOTO PICKUP DEVICE FROM ONE OF TRACKS TO OTHER ONE OF TRACKS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2000
|
Application #:
|
09036997
|
Filing Dt:
|
03/09/1998
|
Title:
|
CHEMICALLY AMPLIFIED RESIST
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2001
|
Application #:
|
09037031
|
Filing Dt:
|
03/09/1998
|
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2000
|
Application #:
|
09037511
|
Filing Dt:
|
03/10/1998
|
Title:
|
PROBE CARD AND WAFER TESTING METHOD USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
09038846
|
Filing Dt:
|
03/12/1998
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2000
|
Application #:
|
09038971
|
Filing Dt:
|
03/12/1998
|
Title:
|
INTERPOLATING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/2001
|
Application #:
|
09039487
|
Filing Dt:
|
03/16/1998
|
Title:
|
METHOD OF FORMING CMOS DEVICE WITH IMPROVED LIGHTLY DOPED DRAIN STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2001
|
Application #:
|
09039768
|
Filing Dt:
|
03/16/1998
|
Title:
|
A METHOD OF FABRICATING GATE CONTACT PADS, LOAD LINES AND WIRING STRUCTURES USING A MINIMUM NUMBER OF ETCHING STEPS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/1999
|
Application #:
|
09040750
|
Filing Dt:
|
03/18/1998
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2000
|
Application #:
|
09041339
|
Filing Dt:
|
03/12/1998
|
Title:
|
CHARGED PARTICLE BEAM EXPOSURE METHOD AND METHOD FOR MAKING PATTERNS ON WAFER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2001
|
Application #:
|
09042732
|
Filing Dt:
|
03/17/1998
|
Title:
|
FLAT PANEL TYPE DISPLAY APPARATUSES HAVING DRIVER ICS FORMED ON PLATE FOR HOLDING DISPLAY GLASSES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/1999
|
Application #:
|
09045567
|
Filing Dt:
|
03/23/1998
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE CLAMPING THE OVERSHOOT AND UNDERSHOOT OF INPUT SIGNAL BY CIRCUIT WITH PN JUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2000
|
Application #:
|
09045568
|
Filing Dt:
|
03/23/1998
|
Title:
|
VOLTAGE LEVEL CONVERTER CIRCUIT IMPROVED IN OPERATION RELIABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2000
|
Application #:
|
09045875
|
Filing Dt:
|
03/23/1998
|
Title:
|
SEMICONDUCTOR DEVICE HAVING A BARRIER FILM FOR PREVENTING PENETRATION OF MOISTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/1998
|
Application #:
|
09046672
|
Filing Dt:
|
03/24/1998
|
Title:
|
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING A BACK GROUND OPERATION MODE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2001
|
Application #:
|
09047349
|
Filing Dt:
|
03/25/1998
|
Title:
|
TRENCH GATE TYPE SEMICONDUCTOR DEVICE WITH CURRENT SENSING CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2000
|
Application #:
|
09047350
|
Filing Dt:
|
03/25/1998
|
Title:
|
RESIN-MOLDED SEMICONDUCTOR DEVICE HAVING A LEAD ON CHIP STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2000
|
Application #:
|
09047484
|
Filing Dt:
|
03/25/1998
|
Title:
|
OPERATION MODE TRANSFER SYSTEM AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2002
|
Application #:
|
09048045
|
Filing Dt:
|
03/26/1998
|
Title:
|
METHOD FOR INSPECTING SEMICONDUCTOR CHIP BONDING PADS USING INFRARED RAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2000
|
Application #:
|
09048883
|
Filing Dt:
|
03/26/1998
|
Title:
|
DIGITAL PLL CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/1999
|
Application #:
|
09049057
|
Filing Dt:
|
03/27/1998
|
Title:
|
TEST METHOD AND CIRCUIT FOR SEMICONDUCTOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2003
|
Application #:
|
09049072
|
Filing Dt:
|
03/27/1998
|
Title:
|
MATERIAL FOR FORMING A FINE PATTERN AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/19/2000
|
Application #:
|
09049713
|
Filing Dt:
|
03/27/1998
|
Title:
|
FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2001
|
Application #:
|
09049919
|
Filing Dt:
|
03/30/1998
|
Title:
|
SEMICONDUCTOR INTERGRATED CIRCUIT INCORPORATING THEREIN CLOCK SUPPLY CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2001
|
Application #:
|
09049930
|
Filing Dt:
|
03/30/1998
|
Title:
|
METHOD FOR DESIGNING INTEGRATED CIRCUIT DEVICE BASED ON MAXIMUM LOAD CAPACITY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/1999
|
Application #:
|
09050350
|
Filing Dt:
|
03/31/1998
|
Title:
|
CLOCKED FLIP FLOP CIRCUIT WITH BUILT-IN CLOCK CONTROLLER AND FREQUENCY DIVIDER USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2001
|
Application #:
|
09050355
|
Filing Dt:
|
03/31/1998
|
Title:
|
PATTERN EXPOSURE METHOD USING ELECTRON BEAM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/1999
|
Application #:
|
09050884
|
Filing Dt:
|
03/31/1998
|
Title:
|
INTERNAL VOLTAGE GENERATOR WITH REDUCED POWER CONSUMPTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2001
|
Application #:
|
09050885
|
Filing Dt:
|
03/31/1998
|
Title:
|
SEMICONDUCTOR MEMORY DEVICE, NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, AND THEIR DATA READING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2001
|
Application #:
|
09050944
|
Filing Dt:
|
03/31/1998
|
Title:
|
METHOD OF ETCHING A LAYER IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2001
|
Application #:
|
09052305
|
Filing Dt:
|
03/31/1998
|
Title:
|
PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITION APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
09052674
|
Filing Dt:
|
03/31/1998
|
Title:
|
MICROCOMPUTER CAPABLE OF SUPPRESSING POWER CONSUMPTION EVEN IF A PROGRAM MEMORY IS INCREASED IN CAPACITY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2000
|
Application #:
|
09053070
|
Filing Dt:
|
04/01/1998
|
Title:
|
Efficient-Memory-Usage Pattern Recognition Utilizing A Tree Structure With A Limited Number Of Parent Nodes And A Plurality Of Subordinate Nodes Containing Similar Data
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2001
|
Application #:
|
09055126
|
Filing Dt:
|
04/06/1998
|
Title:
|
PINCER MOVEMENT DELAY CIRCUIT FOR PRODUCING OUTPUT SIGNAL DIFFERENT IN REPETITION PERIOD FROM INPUT SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
09055259
|
Filing Dt:
|
04/06/1998
|
Title:
|
HIGH VOLTAGE GENERATION CIRCUIT WHICH GENERATES HIGH VOLTAGE BY DIGITALLY ADJUSTING CURRENT AMOUNT FLOWING THROUGH CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2001
|
Application #:
|
09055755
|
Filing Dt:
|
04/07/1998
|
Title:
|
ELECTRON BEAM DRAWING METHOD IN WHICH CELL PROJECTION MANNER AND VARIABLY SHAPED BEAM MANNER ARE USED IN COMBINATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2000
|
Application #:
|
09055905
|
Filing Dt:
|
04/07/1998
|
Title:
|
FAILURE ANALYSIS METHOD AND DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/1999
|
Application #:
|
09055955
|
Filing Dt:
|
04/07/1998
|
Title:
|
SYNCHRONOUS DELAY CIRCUIT FOR GENERATING SYNCHRONOUS DELAYED SIGNALS WITH SHORT TIME AND FREQUENCY MULTIPLYING CIRCUIT USING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
09056626
|
Filing Dt:
|
04/08/1998
|
Title:
|
PULSE-WIDTH MODULATION SIGNAL GENERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2001
|
Application #:
|
09056634
|
Filing Dt:
|
04/08/1998
|
Title:
|
SEMICONDUCTOR DEVICE HAVING INPUT-OUTPUT PROTECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2001
|
Application #:
|
09056849
|
Filing Dt:
|
04/08/1998
|
Title:
|
SEMICONDUCTOR DEVICE HAVING A MULTILAYERED INTERCONNECTION STRUCTURE
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Patent #:
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Issue Dt:
|
06/26/2001
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Application #:
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09056863
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Filing Dt:
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04/08/1998
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Title:
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METHOD FOR SUPPORTING THE DESIGN OF SEMICONDUCTOR INTEGRATED CIRCUIT AND SYSTEM USING THE SAME METHOD
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Patent #:
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Issue Dt:
|
10/12/1999
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Application #:
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09059202
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Filing Dt:
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04/14/1998
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Title:
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SEMICONDUCTOR MEMORY DEVICE HAVING STORAGE CAPACITY OF 2 2N+1 BITS
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Patent #:
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Issue Dt:
|
05/16/2000
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Application #:
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09059248
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Filing Dt:
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04/14/1998
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Title:
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OUTPUT BUFFER CIRCUIT HAVING LOW BREAKDOWN VOLTAGE
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Patent #:
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Issue Dt:
|
03/21/2000
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Application #:
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09059280
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Filing Dt:
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04/14/1998
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Title:
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SEMICONDUCTOR DEVICE WITH MOISTURE RESISTANT FUSE PORTION
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Patent #:
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Issue Dt:
|
08/15/2000
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Application #:
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09059316
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Filing Dt:
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04/13/1998
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Title:
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SEMICONDUCTOR DEVICE HAVING LEAD TERMINALS BENT IN J-SHAPE
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Patent #:
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Issue Dt:
|
06/05/2001
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Application #:
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09059324
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Filing Dt:
|
04/13/1998
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Title:
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SEMICONDUCTOR DEVICE HAVING PELLET MOUNTED ON RADIATING PLATE THEREOF
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Patent #:
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Issue Dt:
|
03/21/2000
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Application #:
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09059702
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Filing Dt:
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04/14/1998
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
|
12/19/2000
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Application #:
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09059894
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Filing Dt:
|
04/14/1998
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Title:
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LATCH CIRCUIT CAPABLE OF REDUCING SLEW CURRENT
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Patent #:
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|
Issue Dt:
|
12/07/1999
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Application #:
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09060078
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Filing Dt:
|
04/15/1998
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Title:
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MASK FOR ELECTRON BEAM EXPOSURE AND ELECTRON BEAM DRAWING METHOD
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Patent #:
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Issue Dt:
|
08/31/1999
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Application #:
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09060295
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Filing Dt:
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04/15/1998
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Title:
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MEMORY DEVICE HAVING SEPARATE DRIVER SECTIONS
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Patent #:
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Issue Dt:
|
09/12/2000
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Application #:
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09060827
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Filing Dt:
|
04/16/1998
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Title:
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POWER SUPPLY VOLTAGE DETECTION DEVICE
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|
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Patent #:
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Issue Dt:
|
02/08/2000
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Application #:
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09061060
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Filing Dt:
|
04/16/1998
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Title:
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SEMICONDUCTOR DEVICE HAVING A CONDUCTOR PATTERN SIDE FACE PROVIDED WITH A SEPARATE CONDUCTIVE SIDEWALL
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Patent #:
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|
Issue Dt:
|
03/13/2001
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Application #:
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09061128
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Filing Dt:
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04/16/1998
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Title:
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DATA TRANSFER CONTROLLER, MICROCOMPUTER AND DATA PROCESSING SYSTEM
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|
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Patent #:
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|
Issue Dt:
|
08/14/2001
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Application #:
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09061248
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Filing Dt:
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04/17/1998
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING PROTECTIVE TRANSISTOR PROTECTING ANOTHER TRANSISTOR DURING PROCESSING
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|
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Patent #:
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|
Issue Dt:
|
12/19/2000
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Application #:
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09061684
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Filing Dt:
|
04/15/1998
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Title:
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MOBILE COMMUNICATION SYSTEM AND MOBILE COMMUNICATION METHOD THEREOF
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Patent #:
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|
Issue Dt:
|
04/18/2000
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Application #:
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09061872
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Filing Dt:
|
04/17/1998
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Title:
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IMPROVED BASE LAYER STRUCTURE COVERING A HOLE OF DECREASING DIAMETER IN AN INSULATION LAYER IN A SEMICONDUCTOR DEVICE
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|
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Patent #:
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|
Issue Dt:
|
01/16/2001
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Application #:
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09061904
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Filing Dt:
|
04/17/1998
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Title:
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PLASTIC-ENCAPSULATED SEMICONDUCTOR DEVICE WITH EXPOSITION PART AND FABRICATION METHOD THEREOF
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|
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Patent #:
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|
Issue Dt:
|
07/24/2001
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Application #:
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09064038
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Filing Dt:
|
04/22/1998
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Title:
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ATM DEVICE AND SHAPING METHOD
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|
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Patent #:
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|
Issue Dt:
|
07/18/2000
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Application #:
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09064067
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Filing Dt:
|
04/22/1998
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Title:
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METHOD OF FORMING AN HSG CAPACITOR LAYER VIA IMPLANTATION
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|
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Patent #:
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|
Issue Dt:
|
03/14/2000
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Application #:
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09064834
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Filing Dt:
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04/23/1998
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Title:
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SEMICONDUCTOR MEMORY DEVICE THAT CAN HAVE POWER CONSUMPTION REDUCED DURING SELF REFRESH MODE
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|
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Patent #:
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|
Issue Dt:
|
01/04/2000
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Application #:
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09064835
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Filing Dt:
|
04/23/1998
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Title:
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SEMICONDUCTOR DEVICE HAVING A STRUCTURE FOR DETECTING A BOOSTED POTENTIAL
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|
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Patent #:
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|
Issue Dt:
|
02/22/2000
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Application #:
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09064866
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Filing Dt:
|
04/22/1998
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Title:
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SEMICONDUCTOR DEVICE
|
|