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11/02/2004
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09/30/2003
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04/29/2003
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08/05/2003
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07/02/2002
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06/23/2000
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09/23/2003
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07/15/2003
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06/28/2000
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04/02/2002
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03/04/2003
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06/29/2000
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06/18/2002
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06/29/2000
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10/15/2002
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11/26/2002
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05/06/2003
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02/19/2002
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01/29/2002
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07/10/2000
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03/16/2004
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07/10/2000
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METHODS FOR PROVIDING ESTIMATES OF THE CURRENT TIME IN A COMPUTER SYSTEM INCLUDING A LOCAL TIME SOURCE HAVING ONE OF SEVERAL POSSIBLE LEVELS OF TRUST WITH REGARD TO TIMEKEEPING
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12/24/2002
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07/13/2000
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04/20/2004
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07/14/2000
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12/27/2005
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07/09/2002
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07/20/2000
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05/14/2002
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06/08/2004
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07/24/2000
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03/16/2004
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07/25/2000
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METHOD OF CONTROLLING SHEET RESISTANCE OF METAL SILICIDE REGIONS BY CONTROLLING THE SALICIDE STRIP TIME
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09/23/2003
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07/25/2000
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07/22/2003
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05/20/2003
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11/08/2005
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08/14/2000
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03/16/2004
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08/10/2000
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10/28/2003
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08/14/2000
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BALL GRID ARRAY MODULE
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09/30/2003
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08/16/2000
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RESIST COMPOSITIONS CONTAINING LACTONE ADDITIVES
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05/21/2002
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08/17/2000
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METHOD OF SELECTIVELY CONTROLLING CONTACT RESISTANCE BY CONTROLLING IMPURITY CONCENTRATION AND SILICIDE THICKNESS
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11/20/2001
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08/17/2000
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02/11/2003
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08/17/2000
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05/07/2002
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08/18/2000
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Method of forming junction-leakage free metal salicide in a semiconductor wafer with ultra-low silicon consumption
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04/09/2002
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08/22/2000
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DETECTION OF FLUX RESIDUE
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07/10/2001
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08/22/2000
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09/02/2003
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08/21/2000
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11/06/2001
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08/22/2000
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06/11/2002
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08/22/2000
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02/18/2003
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08/24/2000
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METHOD AND SYSTEM TO REDUCE SWITCHING SIGNAL NOISE ON A DEVICE AND A DEVICE AS RESULT THEREOF
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02/11/2003
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08/28/2000
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04/08/2003
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08/29/2000
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11/25/2003
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08/29/2000
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11/26/2002
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08/30/2000
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CONTRACT METHODOLOGY FOR CONCURRENT HIERARCHICAL DESIGN
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09/10/2002
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08/30/2000
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INTEGRATED CIRCUIT PACKAGE INCORPORATING CAMOUFLAGED PROGRAMMABLE ELEMENTS
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04/09/2002
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08/30/2000
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CAPACITOR LAMINATE FOR USE IN PRINTED CIRCUIT BOARD AND AS AN INTERCONNECTOR
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07/06/2004
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08/31/2000
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SYSTEM AND METHOD FOR MONITOING AND CONTROLLING A POWER-MANAGEABLE RESOURCE BASED UPON ACTIVITIES OF A PLURALITY OF DEVICES
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07/02/2002
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08/31/2000
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METHOD OF FORMING MULTILEVEL INTERCONNECT STRUCTURE CONTAINING AIR GAPS INCLUDING UTILIZING BOTH SACRIFICIAL AND PLACEHOLDER MATERIAL
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10/29/2002
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09/01/2000
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RESIST REMOVAL MONITORING BY RAMAN SPECTROSCOPY
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05/14/2002
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09/06/2000
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FILLING AN INTERCONNECT OPENING WITH DIFFERENT TYPES OF ALLOYS TO ENHANCE INTERCONNECT RELIABILITY
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03/18/2003
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09/07/2000
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ELECTRICAL COUPLING OF A STIFFENER TO A CHIP CARRIER
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01/28/2003
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09/07/2000
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HIGH-VOLTAGE HIGH-SPEED SOI MOSFET
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04/09/2002
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09660396
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09/12/2000
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PASSIVATION OF SEMICONDUCTOR DEVICE SURFACES USING AN IODINE/ETHANOL SOLUTION
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04/02/2002
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09/13/2000
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Isotropic resistor protect etch to aid in residue removal
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12/10/2002
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09/13/2000
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INTEGRATED SEMICONDUCTOR PACKAGE
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04/16/2002
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09661041
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09/14/2000
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FABRICATION OF METAL OXIDE STRUCTURE FOR A GATE DIELECTRIC OF A FIELD EFFECT TRANSISTOR
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05/13/2003
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09661694
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09/14/2000
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METHOD AND APPARATUS FOR PARSING EVENT LOGS TO DETERMINE TOOL OPERABILITY
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10/01/2002
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09662016
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09/14/2000
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MEASUREMENT METHOD OF ZERNIKE COMA ABERRATION COEFFICIENT
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05/14/2002
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09664714
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09/19/2000
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Title:
|
PASSIVATION OF SIDEWALL SPACERS USING OZONATED WATER
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Patent #:
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Issue Dt:
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12/11/2001
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Application #:
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09666088
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Filing Dt:
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09/21/2000
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Title:
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Self-aligned damascene gate formation with low gate resistance
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09667573
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Filing Dt:
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09/22/2000
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Title:
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ACTIVE MASK EXPOSURE COMPENSATION OF UNDERLYING NITRIDE THICKNESS VARIATION TO REDUCE CRITICAL DIMENSION (CD) VARIATION
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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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09667600
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Filing Dt:
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09/22/2000
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Title:
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METHOD OF INHIBITING LATERAL DIFFUSION BETWEEN ADJACENT WELLS BY INTRODUCING CARBON OR FLUORINE IONS INTO BOTTOM OF STI GROOVE
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Patent #:
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Issue Dt:
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02/05/2002
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Application #:
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09667601
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Filing Dt:
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09/22/2000
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Title:
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Removable spacer technology using ion implantation for forming asymmetric MOS transistors
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Patent #:
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Issue Dt:
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01/08/2002
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Application #:
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09667602
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Filing Dt:
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09/22/2000
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Title:
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Use of knocked-on oxygen atoms for reduction of transient enhanced diffusion
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09667685
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Filing Dt:
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09/22/2000
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Title:
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RETROGRADE WELL STRUCTURE FORMATION BY NITROGEN IMPLANTATION
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09670728
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Filing Dt:
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09/27/2000
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Title:
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MULTIPOLE ELECTROSTATIC E-BEAM DEFLECTOR
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09670741
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Filing Dt:
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09/27/2000
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Title:
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PROCESS FOR PROTECTING ARRAY TOP OXIDE
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09670968
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Filing Dt:
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09/27/2000
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Title:
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FABRICATION OF A METALIZED BLIND VIA
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Patent #:
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Issue Dt:
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02/11/2003
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Application #:
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09671944
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Filing Dt:
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09/27/2000
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Title:
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SUPERCONDUCTOR BARRIER LAYER FOR INTEGRATED CIRCUIT INTERCONNECTS
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09675246
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Filing Dt:
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09/29/2000
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Title:
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SEMICONDUCTOR FUSES AND ANTIFUSES IN VERTICAL DRAMS
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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09675435
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Filing Dt:
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09/29/2000
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Title:
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EXTENDIBLE PROCESS FOR IMPROVED TOP OXIDE LAYER FOR DRAM ARRAY AND THE GATE INTERCONNECTS WHILE PROVIDING SELF-ALIGNED GATE CONTACTS
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Patent #:
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Issue Dt:
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07/29/2003
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Application #:
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09675634
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Filing Dt:
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09/29/2000
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Title:
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SYSTEM AND METHOD FOR FAST INTERCONNECT DELAY ESTIMATION THROUGH ITERATIVE REFINEMENT
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09675840
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Filing Dt:
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09/29/2000
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Title:
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PREPARATION OF STRAINED SI/SIGE ON INSULATOR BY HYDROGEN INDUCED LAYER TRANSFER TECHNIQUE
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Patent #:
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Issue Dt:
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12/16/2003
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Application #:
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09676882
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Filing Dt:
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09/29/2000
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Title:
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METHOD OF FILM DEPOSITION, AND FABRICATION OF STRUCTURES
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Patent #:
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Issue Dt:
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12/23/2003
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Application #:
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09676883
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Filing Dt:
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09/29/2000
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Title:
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SYSTEM AND METHOD FOR SEGMENTATION OF IMAGES OF OBJECTS THAT ARE OCCLUDED BY A SEMI-TRANSPARENT MATERIAL
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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09677955
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Filing Dt:
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10/02/2000
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Title:
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Method for detecting sloped contact holes using a critical-dimension waveform
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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09678315
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Filing Dt:
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10/03/2000
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Title:
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SILICON-ON-INSULATOR (SOI) TRENCH PHOTODIODE
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09678946
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Filing Dt:
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10/03/2000
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Title:
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ATOMIC LAYER BARRIER LAYER FOR INTEGRATED CIRCUIT INTERCONNECTS
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Patent #:
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Issue Dt:
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01/29/2002
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Application #:
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09679124
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Filing Dt:
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10/04/2000
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Title:
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Super low-power generator system for embedded applications
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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09679369
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Filing Dt:
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10/05/2000
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Title:
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Enhanced electroless deposition of dielectric precursor materials for use in in-laid gate MOS transistors
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09679370
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Filing Dt:
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10/05/2000
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Title:
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DOUBLE SILICIDE FORMATION IN POLYSILICON GATE WITHOUT SILICIDE IN SOURCE/DRAIN EXTENSIONS
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09679373
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Filing Dt:
|
10/05/2000
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Title:
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NITROGEN OXIDE PLASMA TREATMENT FOR REDUCED NICKEL SILICIDE BRIDGING
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09679374
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Filing Dt:
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10/05/2000
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Title:
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NH3/N2-PLASMA TREATMENT FOR REDUCED NICKEL SILICIDE BRIDGING
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