|
|
Patent #:
|
|
Issue Dt:
|
05/02/2006
|
Application #:
|
10982296
|
Filing Dt:
|
11/05/2004
|
Title:
|
MULTI BIT PROGRAM ALGORITHM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
10983919
|
Filing Dt:
|
11/08/2004
|
Publication #:
|
|
Pub Dt:
|
03/30/2006
| | | | |
Title:
|
CONTROL OF MEMORY DEVICES POSSESSING VARIABLE RESISTANCE CHARACTERISTICS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2006
|
Application #:
|
10984065
|
Filing Dt:
|
11/09/2004
|
Publication #:
|
|
Pub Dt:
|
05/11/2006
| | | | |
Title:
|
CIRCUIT FOR GENERATING A CENTERED REFERENCE VOLTAGE FOR A 1T/1C FERROELECTRIC MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2010
|
Application #:
|
10984104
|
Filing Dt:
|
11/09/2004
|
Title:
|
ADAPTIVE OUTPUT DRIVER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2012
|
Application #:
|
10986799
|
Filing Dt:
|
11/15/2004
|
Publication #:
|
|
Pub Dt:
|
08/11/2005
| | | | |
Title:
|
A SYSTEM AND METHOD FOR REGULATING LOADING ON AN INTEGRATED CIRCUIT POWER SUPPLY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2007
|
Application #:
|
11001940
|
Filing Dt:
|
12/01/2004
|
Title:
|
METHOD, SYSTEM, AND CIRCUIT FOR PERFORMING A MEMORY RELATED OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
11003208
|
Filing Dt:
|
12/02/2004
|
Title:
|
METHOD FOR ACHIEVING INCREASED CONTROL OVER INTERCONNECT LINE THICKNESS ACROSS A WAFER AND BETWEEN WAFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
|
Application #:
|
11003528
|
Filing Dt:
|
12/03/2004
|
Title:
|
HIGH-VOLTAGE TRANSISTOR HAVING A U-SHAPED GATE AND METHOD FOR FORMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
11006034
|
Filing Dt:
|
12/07/2004
|
Title:
|
INPUT OF TEST CONDITIONS AND OUTPUT GENERATION FOR BUILT-IN SELF TEST
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2009
|
Application #:
|
11006934
|
Filing Dt:
|
12/07/2004
|
Title:
|
METHOD AND APPARATUS FOR USING EMPTY TIME SLOTS FOR SPREAD SPECTRUM ENCODING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2010
|
Application #:
|
11006998
|
Filing Dt:
|
12/07/2004
|
Title:
|
METHOD AND APPARATUS FOR TUNING A RADIO RECEIVER WITH A RADIO TRANSMITTER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2009
|
Application #:
|
11007072
|
Filing Dt:
|
12/07/2004
|
Title:
|
METHOD AND APPARATUS FOR BINDING PERIPHERAL DEVICES TO A COMPUTER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
|
Application #:
|
11007332
|
Filing Dt:
|
12/09/2004
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
METHOD FOR READING NON-VOLATILE MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
11008233
|
Filing Dt:
|
12/10/2004
|
Title:
|
MEMORY CELL HAVING ENHANCED HIGH-K DIELECTRIC
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2009
|
Application #:
|
11015105
|
Filing Dt:
|
12/17/2004
|
Title:
|
STAGED CORRELATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
11021394
|
Filing Dt:
|
12/23/2004
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
NON-VOLATILE COUNTER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11023914
|
Filing Dt:
|
12/28/2004
|
Title:
|
CURRENT SENSING ARCHITECTURE FOR HIGH BITLINE VOLTAGE, RAIL TO RAIL OUTPUT SWING AND VCC NOISE CANCELLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11024257
|
Filing Dt:
|
12/28/2004
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
SENSE AMPLIFIERS WITH HIGH VOLTAGE SWING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2005
|
Application #:
|
11024750
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
06/02/2005
| | | | |
Title:
|
MULTIPLE USE MEMORY CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2010
|
Application #:
|
11024843
|
Filing Dt:
|
12/30/2004
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
MEMORY CONTROL CIRCUIT AND MICROPROCESSORY SYSTEM FOR PRE-FETCHING INSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2007
|
Application #:
|
11029380
|
Filing Dt:
|
01/06/2005
|
Publication #:
|
|
Pub Dt:
|
06/02/2005
| | | | |
Title:
|
METHOD FOR OPERATING A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2012
|
Application #:
|
11033588
|
Filing Dt:
|
01/12/2005
|
Publication #:
|
|
Pub Dt:
|
07/13/2006
| | | | |
Title:
|
MEMORY DEVICE HAVING TRAPEZOIDAL BITLINES AND METHOD OF FABRICATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/2009
|
Application #:
|
11035055
|
Filing Dt:
|
01/14/2005
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
A SEMICONDUCTOR DEVICE HAVING AN ARITHMETIC UNIT OF A RECONFIGURABLE CIRCUIT CONFIGURATION IN ACCORDANCE WITH STORED CONFIGURATION DATA AND A MEMORY STORING FIXED VALUE DATA TO BE SUPPLIED TO THE ARITHMETIC UNIT, REQUIRING NO DATA AREA FOR STORING FIXED VALUE DATA TO BE SET IN A CONFIGURATION MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2007
|
Application #:
|
11035188
|
Filing Dt:
|
01/13/2005
|
Title:
|
METHOD FOR CONTROLLING POLY 1 THICKNESS AND UNIFORMITY IN A MEMORY ARRAY FABRICATION PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
11036332
|
Filing Dt:
|
01/18/2005
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
Title:
|
MICROCOMPUTER WITH INTERNAL DMA
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11036395
|
Filing Dt:
|
01/18/2005
|
Publication #:
|
|
Pub Dt:
|
10/06/2005
| | | | |
Title:
|
MICROCOMPUTER CAPABLE OF MONITORING INTERNAL MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
11041608
|
Filing Dt:
|
01/24/2005
|
Publication #:
|
|
Pub Dt:
|
07/27/2006
| | | | |
Title:
|
AUTOMATED TESTS FOR BUILT-IN SELF TEST
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
11049855
|
Filing Dt:
|
02/04/2005
|
Title:
|
NON-VOLATILE MEMORY DEVICE WITH IMPROVED ERASE SPEED
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
11052688
|
Filing Dt:
|
02/07/2005
|
Publication #:
|
|
Pub Dt:
|
08/10/2006
| | | | |
Title:
|
MEMORY ELEMENT USING ACTIVE LAYER OF BLENDED MATERIALS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/25/2006
|
Application #:
|
11057143
|
Filing Dt:
|
02/15/2005
|
Publication #:
|
|
Pub Dt:
|
06/23/2005
| | | | |
Title:
|
VOLTAGE DETECTION CIRCUIT, SEMICONDUCTOR DEVICE, METHOD FOR CONTROLLING VOLTAGE DETECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2006
|
Application #:
|
11061119
|
Filing Dt:
|
02/18/2005
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
Title:
|
CURRENT-VOLTAGE CONVERTER CIRCUIT AND ITS CONTROL METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
11061307
|
Filing Dt:
|
02/18/2005
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY STORAGE DEVICE AND A REDUNDANCY CONTROL METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
11061365
|
Filing Dt:
|
02/18/2005
|
Publication #:
|
|
Pub Dt:
|
08/25/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY STORAGE DEVICE AND ITS REDUNDANT METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2008
|
Application #:
|
11062629
|
Filing Dt:
|
02/23/2005
|
Title:
|
SYSTEM AND METHOD FOR GATE FORMATION IN A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2007
|
Application #:
|
11062641
|
Filing Dt:
|
02/23/2005
|
Title:
|
SYSTEM AND METHOD FOR ERASING A MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11063138
|
Filing Dt:
|
02/22/2005
|
Title:
|
MEMORY CELL AND METHOD OF MAKING THE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2008
|
Application #:
|
11063975
|
Filing Dt:
|
02/24/2005
|
Publication #:
|
|
Pub Dt:
|
05/18/2006
| | | | |
Title:
|
RESET CONTROL CIRCUIT AND RESET CONTROL METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/2010
|
Application #:
|
11069500
|
Filing Dt:
|
03/01/2005
|
Title:
|
WIRELESS HUMAN INTERFACE DEVICE PACKET COMPRESSION SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2010
|
Application #:
|
11075999
|
Filing Dt:
|
03/08/2005
|
Title:
|
METHOD FOR CONTAINING A SILICIDED GATE WITHIN A SIDEWALL SPACER IN INTEGRATED CIRCUIT TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
|
Application #:
|
11076252
|
Filing Dt:
|
03/08/2005
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
DECODER FOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2012
|
Application #:
|
11078873
|
Filing Dt:
|
03/11/2005
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
MEMORY DEVICE WITH IMPROVED SWITCHING SPEED AND DATA RETENTION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
11082526
|
Filing Dt:
|
03/17/2005
|
Publication #:
|
|
Pub Dt:
|
06/29/2006
| | | | |
Title:
|
COUNTING SCHEME WITH AUTOMATIC POINT-OF-REFERENCE GENERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2010
|
Application #:
|
11083534
|
Filing Dt:
|
03/18/2005
|
Title:
|
METHOD AND APPARATUS FOR USING VALID BITS FOR ERASURE CORRECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2005
|
Application #:
|
11085133
|
Filing Dt:
|
03/22/2005
|
Publication #:
|
|
Pub Dt:
|
07/28/2005
| | | | |
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WHICH STORES TWO BITS PER MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
11085496
|
Filing Dt:
|
03/22/2005
|
Publication #:
|
|
Pub Dt:
|
07/28/2005
| | | | |
Title:
|
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WITH A PLURALITY OF SECTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2006
|
Application #:
|
11086884
|
Filing Dt:
|
03/22/2005
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
TEMPERATURE COMPENSATION OF THIN FILM DIODE VOLTAGE THRESHOLD IN MEMORY SENSING CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2006
|
Application #:
|
11087944
|
Filing Dt:
|
03/23/2005
|
Title:
|
CURRENT SENSING CIRCUIT WITH A CURRENT-COMPENSATED DRAIN VOLTAGE REGULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11089707
|
Filing Dt:
|
03/25/2005
|
Title:
|
MEMORY DEVICE WITH IMPROVED DATA RETENTION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
11089708
|
Filing Dt:
|
03/25/2005
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
MEMORY DEVICE WITH IMPROVED DATA RETENTION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2008
|
Application #:
|
11089732
|
Filing Dt:
|
03/25/2005
|
Title:
|
INCREASING SELF-ALIGNED CONTACT AREAS IN INTEGRATED CIRCUITS USING A DISPOSABLE SPACER
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/2007
|
Application #:
|
11090716
|
Filing Dt:
|
03/25/2005
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD FOR WRITING DATA INTO THE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/2011
|
Application #:
|
11091519
|
Filing Dt:
|
03/29/2005
|
Title:
|
ULTRAVIOLET RADIATION BLOCKING INTERLAYER DIELECTRIC
|
|
|
Patent #:
|
|
Issue Dt:
|
04/19/2011
|
Application #:
|
11091524
|
Filing Dt:
|
03/29/2005
|
Title:
|
FILM STACKS TO PREVENT UV-INDUCED DEVICE DAMAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2006
|
Application #:
|
11091982
|
Filing Dt:
|
03/29/2005
|
Title:
|
QUAD BIT USING HOT-HOLE ERASE FOR CBD CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2012
|
Application #:
|
11095849
|
Filing Dt:
|
03/31/2005
|
Publication #:
|
|
Pub Dt:
|
10/05/2006
| | | | |
Title:
|
METHOD OF PROVIDING AN ERASE ACTIVATION ENERGY OF A MEMEORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11099339
|
Filing Dt:
|
04/04/2005
|
Publication #:
|
|
Pub Dt:
|
10/05/2006
| | | | |
Title:
|
NON-CRITICAL COMPLEMENTARY MASKING METHOD FOR POLY-1 DEFINITION IN FLASH MEMORY DEVICE FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
11099517
|
Filing Dt:
|
04/06/2005
|
Publication #:
|
|
Pub Dt:
|
08/11/2005
| | | | |
Title:
|
CRYSTAL OSCILLATION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
11099847
|
Filing Dt:
|
04/06/2005
|
Title:
|
SPIN ON MEMORY CELL ACTIVE LAYER DOPED WITH METAL IONS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2008
|
Application #:
|
11103367
|
Filing Dt:
|
04/11/2005
|
Publication #:
|
|
Pub Dt:
|
10/12/2006
| | | | |
Title:
|
THRESHOLD VOLTAGE SHIFT IN NROM CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2013
|
Application #:
|
11109719
|
Filing Dt:
|
04/20/2005
|
Title:
|
VOID FREE INTERLAYER DIELECTRIC
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2015
|
Application #:
|
11109965
|
Filing Dt:
|
04/19/2005
|
Title:
|
Method for manufacturing a contact for a semiconductor component and related structure
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
11112607
|
Filing Dt:
|
04/22/2005
|
Title:
|
METHOD FOR FORMING MEMORY ARRAY BITLINES COMPRISING EPITAXIALLY GROWN SILICON AND RELATED STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2008
|
Application #:
|
11116538
|
Filing Dt:
|
04/27/2005
|
Title:
|
METHOD FOR MANUFACTURING A MEMORY DEVICE HAVING A NANOCRYSTAL CHARGE STORAGE REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
11116551
|
Filing Dt:
|
04/27/2005
|
Title:
|
METHOD FOR MANUFACTURING A MEMORY DEVICE HAVING A NANOCRYSTAL CHARGE STORAGE REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/2007
|
Application #:
|
11116571
|
Filing Dt:
|
04/27/2005
|
Publication #:
|
|
Pub Dt:
|
11/02/2006
| | | | |
Title:
|
MULTI-CHIP MODULE AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
11121084
|
Filing Dt:
|
05/04/2005
|
Publication #:
|
|
Pub Dt:
|
07/27/2006
| | | | |
Title:
|
MULTI-PHASE DC-DC CONVERTER AND CONTROL CIRCUIT FOR MULTI-PHASE DC-DC CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
11123326
|
Filing Dt:
|
05/04/2005
|
Publication #:
|
|
Pub Dt:
|
11/24/2005
| | | | |
Title:
|
OPTICAL POSITION SENSING DEVICE INCLUDING INTERLACED GROUPS OF PHOTOSENSITIVE ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2013
|
Application #:
|
11125396
|
Filing Dt:
|
05/04/2005
|
Publication #:
|
|
Pub Dt:
|
11/09/2006
| | | | |
Title:
|
Multi-chip module having a support structure and method of manufacture
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2008
|
Application #:
|
11126330
|
Filing Dt:
|
05/11/2005
|
Publication #:
|
|
Pub Dt:
|
06/15/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
11126739
|
Filing Dt:
|
05/11/2005
|
Publication #:
|
|
Pub Dt:
|
12/08/2005
| | | | |
Title:
|
CARRIER FOR STACKED TYPE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
11126869
|
Filing Dt:
|
05/11/2005
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD HAVING DATA PROTECTION FEATURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
11127175
|
Filing Dt:
|
05/12/2005
|
Title:
|
POLYMER SPACERS FOR CREATING SUB-LITHOGRAPHIC SPACES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2009
|
Application #:
|
11128391
|
Filing Dt:
|
05/13/2005
|
Title:
|
AGGRESSIVE CLEANING PROCESS FOR SEMICONDUCTOR DEVICE CONTACT FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2013
|
Application #:
|
11131244
|
Filing Dt:
|
05/18/2005
|
Publication #:
|
|
Pub Dt:
|
08/10/2006
| | | | |
Title:
|
Spread spectrum clock generation circuit and a method of controlling thereof
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2010
|
Application #:
|
11131322
|
Filing Dt:
|
05/18/2005
|
Publication #:
|
|
Pub Dt:
|
12/15/2005
| | | | |
Title:
|
COMMUNICATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11132172
|
Filing Dt:
|
05/19/2005
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
EARLY EFFECT CANCELLING CIRCUIT, DIFFERENTIAL AMPLIFIER, LINEAR REGULATOR, AND EARLY EFFECT CANCELING METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2016
|
Application #:
|
11133966
|
Filing Dt:
|
05/20/2005
|
Publication #:
|
|
Pub Dt:
|
12/01/2005
| | | | |
Title:
|
METHOD OF FABRICATING A SEMICONDUCTOR DEVICE USED IN A STACKED-TYPE SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2010
|
Application #:
|
11136569
|
Filing Dt:
|
05/25/2005
|
Title:
|
BURIED SILICIDE LOCAL INTERCONNECT WITH SIDEWALL SPACERS AND METHOD FOR MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2008
|
Application #:
|
11137175
|
Filing Dt:
|
05/24/2005
|
Title:
|
SUPPLYING POWER FROM PERIPHERAL TO HOST VIA USB
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2007
|
Application #:
|
11145232
|
Filing Dt:
|
06/06/2005
|
Publication #:
|
|
Pub Dt:
|
07/20/2006
| | | | |
Title:
|
MULTIPHASE DC-DC CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/2009
|
Application #:
|
11146237
|
Filing Dt:
|
06/07/2005
|
Publication #:
|
|
Pub Dt:
|
07/20/2006
| | | | |
Title:
|
MICROCONTROLLER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2011
|
Application #:
|
11152375
|
Filing Dt:
|
06/15/2005
|
Publication #:
|
|
Pub Dt:
|
03/08/2007
| | | | |
Title:
|
JUNCTION LEAKAGE SUPPRESSION IN MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2007
|
Application #:
|
11152547
|
Filing Dt:
|
06/14/2005
|
Publication #:
|
|
Pub Dt:
|
12/14/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
11153738
|
Filing Dt:
|
06/15/2005
|
Publication #:
|
|
Pub Dt:
|
12/21/2006
| | | | |
Title:
|
DEVICE TO PROGRAM ADJACENT STORAGE CELLS OF DIFFERENT NROM CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2008
|
Application #:
|
11154070
|
Filing Dt:
|
06/16/2005
|
Publication #:
|
|
Pub Dt:
|
10/20/2005
| | | | |
Title:
|
DUAL-LEVEL STACKED FLASH MEMORY CELL WITH A MOSFET STORAGE TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2011
|
Application #:
|
11154097
|
Filing Dt:
|
06/15/2005
|
Title:
|
RADIO COMMUNICATION DEVICE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
11155252
|
Filing Dt:
|
06/17/2005
|
Publication #:
|
|
Pub Dt:
|
12/21/2006
| | | | |
Title:
|
METHOD CIRCUIT AND SYSTEM FOR COMPENSATING FOR TEMPERATURE INDUCED MARGIN LOSS IN NON-VOLATILE MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11164556
|
Filing Dt:
|
11/29/2005
|
Publication #:
|
|
Pub Dt:
|
05/31/2007
| | | | |
Title:
|
SRAM VOLTAGE CONTROL FOR IMPROVED OPERATIONAL MARGINS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
11165008
|
Filing Dt:
|
06/23/2005
|
Publication #:
|
|
Pub Dt:
|
12/29/2005
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND SOURCE VOLTAGE CONTROL METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2012
|
Application #:
|
11165329
|
Filing Dt:
|
06/24/2005
|
Title:
|
MEMORY DEVICE WITH BURIED BIT LINE STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2011
|
Application #:
|
11167310
|
Filing Dt:
|
06/28/2005
|
Publication #:
|
|
Pub Dt:
|
01/05/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING A DYNAMICALLY RECONFIGURABLE CIRCUIT CONFIGURATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
11169986
|
Filing Dt:
|
06/28/2005
|
Publication #:
|
|
Pub Dt:
|
01/11/2007
| | | | |
Title:
|
ANTIFUSE CAPACITOR FOR CONFIGURING INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2007
|
Application #:
|
11173930
|
Filing Dt:
|
07/01/2005
|
Publication #:
|
|
Pub Dt:
|
01/04/2007
| | | | |
Title:
|
POWER INTERCONNECT STRUCTURE FOR BALANCED BITLINE CAPACITANCE IN A MEMORY ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
11174560
|
Filing Dt:
|
07/06/2005
|
Publication #:
|
|
Pub Dt:
|
01/11/2007
| | | | |
Title:
|
PROGRAMMING A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2008
|
Application #:
|
11175801
|
Filing Dt:
|
07/05/2005
|
Publication #:
|
|
Pub Dt:
|
01/12/2006
| | | | |
Title:
|
PROTECTION OF NROM DEVICES FROM CHARGE DAMAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2011
|
Application #:
|
11185783
|
Filing Dt:
|
07/21/2005
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
CONTROL CIRCUIT AND CONTROL METHOD OF CURRENT MODE CONTROL TYPE DC-DC CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2009
|
Application #:
|
11187650
|
Filing Dt:
|
07/22/2005
|
Publication #:
|
|
Pub Dt:
|
01/26/2006
| | | | |
Title:
|
CONTROLLER, DATA MEMORY SYSTEM, DATA REWRITING METHOD, AND COMPUTER PROGRAM PRODUCT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
11189874
|
Filing Dt:
|
07/27/2005
|
Title:
|
System and method for improving reliability in a semiconductor device
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/2010
|
Application #:
|
11193220
|
Filing Dt:
|
07/29/2005
|
Title:
|
DYNAMIC DATA RATE USING MULTIPLICATIVE PN-CODES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2007
|
Application #:
|
11193391
|
Filing Dt:
|
08/01/2005
|
Title:
|
METHODS AND SYSTEMS FOR REDUCING THE THRESHOLD VOLTAGE DISTRIBUTION FOLLOWING A MEMORY CELL ERASE
|
|